Differential input buffers have been used in many digital devices, such as memory circuits. Generally, the differential buffer may amplify a voltage difference between an input signal and a reference level. However, in certain applications, a reference level input to the differential buffer may approach the level of the voltage power input to the differential buffer. As the reference level becomes closer to the voltage power input level, certain types of differential buffers provide less and less output voltage swing and eventually ceases to operate effectively. One such application is communication or processing devices using high speed transceiver logic (HSTL). Further, other types of differential buffers may have degraded operation as the reference level approaches the other power input level.
It would be desirable to provide a differential buffer that could successfully operate when the voltage reference level varies across a wider range to provide increased control and design flexibility. Accordingly, there is a need for an improved differential buffer for use in integrated circuits that receive digital signals, such as memory devices.